1. Field of the Invention
This invention relates generally to electronic circuits and, in particular, to phase locked loop and delay locked loop circuits used in electronic circuits.
2. Description of the Related Art
For certain applications, it is desired to change the frequency of a phase locked loop (PLL) or delay locked loop (DLL) output clock signal based on some configuration such as, for example, changing Peripheral Component Interconnect (PCI) standards. In the past, this required the user to have separate programming object files (POF's) with different settings for each of the different frequencies. In order to change counter and delay settings using POF, the user needs to load the entire new POF for the programmable logic device (PLD) of which the PLL or DLL is a part. Thereafter, the user needs to wait until the PLL or DLL re-acquires lock (i.e., PLL or DLL has phase and frequency locked onto the reference clock.)
The present invention addresses this and other disadvantages of the existing PLL and DLL circuits.